Wed 6 Dec 2023 17:45 - 17:52 at Golden Gate C2 - Formal Verification Chair(s): Christoph Treude

P4 is a main-streaming language for Software Defined Network (SDN) data planes. Compared to previous SDN protocols, P4 is target-independent, feasible, and configurable. However, logic errors may occur in P4 programs, resulting in improper packet processing, which may cause serious network errors and information disclosure. In addition, P4 programs contain many branches and thus are more challenging to ensure correctness.

Formal verification is a powerful technique to verify the correctness of P4 programs. Unfortunately, current P4 verification studies lack basic toolchains, and their intermediate languages are not expressive enough. We present P4b, an efficient translator from P4 programs to Boogie, a verification-oriented intermediate representation. We provide formal translation rules to ensure the correctness of the translation process. The translated results can be verified by the toolchain of Boogie. We conducted experiments on 170 P4 programs collected from GitHub, and the experiment results demonstrate that our translator is useful and practical.

The screencast is available at https://youtu.be/8_rEj3QFQeM. The tool is available at https://github.com/Invincibleyc/P4B-Translator.

Wed 6 Dec

Displayed time zone: Pacific Time (US & Canada) change

16:00 - 18:00
16:00
15m
Talk
State Merging with Quantifiers in Symbolic Execution
Research Papers
David Trabish Tel Aviv University, Noam Rinetzky Tel Aviv University, Sharon Shoham Tel Aviv University, Vaibhav Sharma University of Minnesota
DOI Pre-print Media Attached
16:15
15m
Talk
Towards Strengthening Formal Specifications with Mutation Model Checking
Ideas, Visions and Reflections
Maxime Cordy SnT, University of Luxembourg, Sami Lazreg SnT, University of Luxembourg, Axel Legay Université Catholique de Louvain, Belgium, Pierre Yves Schobbens University of Namur
Media Attached
16:30
15m
Talk
PropProof: Free Model-Checking Harnesses from PBT
Industry Papers
Yoshiki Takashima Carnegie Mellon University
DOI Media Attached
16:45
15m
Talk
Engineering a Formally Verified Automated Bug Finder
Research Papers
Arthur Correnson CISPA Helmholtz Center for Information Security, Dominic Steinhöfel CISPA Helmholtz Center for Information Security
Media Attached
17:00
15m
Talk
LightF3: A Lightweight Fully-Process Formal Framework for Automated Verifying Railway Interlocking Systems
Industry Papers
Yibo Dong East China Normal University; Shanghai Trusted Industrial Control Platform, Xiaoyu Zhang East China Normal University, Yicong Xu East China Normal University, Chang Cai East China Normal University, Yu Chen East China Normal University, Weikai Miao East China Normal University, Jianwen Li East China Normal University, China, Geguang Pu East China Normal University
DOI Media Attached
17:15
15m
Talk
Speeding up SMT Solving via Compiler Optimization
Research Papers
Benjamin Mikek Georgia Institute of Technology, Qirun Zhang Georgia Institute of Technology
Media Attached
17:30
15m
Talk
[Remote] Detecting Atomicity Violations in Interrupt-Driven Programs via Interruption Points Selecting and Delayed ISR-Triggering
Research Papers
Bin Yu School of Computer Science and Technology, Xidian University, Cong Tian Xidian University, Hengrui Xing School of Computer Science and Technology, Xidian University, Zuchao Yang School of Computer Science and Technology, Xidian University, Jie Su School of Computer Science and Technology, Xidian University, Xu Lu School of Computer Science and Technology, Xidian University, Jiyu Yang School of Computer Science and Technology, Xidian University, Liang Zhao School of Computer Science and Technology, Xidian University, Xiaofeng Li Beijing Institute of Control Engineering, Zhenhua Duan Xidian University
Media Attached
17:45
7m
Talk
[Remote] P4b: A Translator from P4 Programs to Boogie
Demonstrations
Chong Ye Tsinghua University, Fei He Tsinghua University
Media Attached